Initial support for AVX10V1AUX has been merged into the GCC 17 codebase. The work was led by AMD engineers over several weeks before being accepted into GCC Git.
AVX10V1AUX serves as a bridge between early AVX10 hardware and later AVX10.2 capabilities. It adds native VNNI INT8 and VNNI INT16 support, along with instruction borrowing and other incremental changes.
The new capabilities can be enabled with the -mavx10v1aux compiler option. GCC does not yet associate AVX10V1AUX with any specific Intel or AMD processor generations.
Sources: Phoronix.